Computer design of nanocircuits for cryptographic engineering

Abstract

Since the introduction of side-channel attacks, cryptographic devices have been highly susceptible to power and electromagnetic (EM) analysis attacks: because these attacks require only relatively inexpensive equipment’s. Most of cryptographic circuits are typically implemented in CMOS. There is a strong dependency between power consumption of circuits implemented based on this logic style and the data that is processed by the circuit. Due to the difference between input and output capacitances of CMOS-transistors, when the transistor switches on and off, different amount of current flows through the transistor and leads to different amount of power consumption when the transistor processes logic a “0” or logic “1”. Unless adequate countermeasures are implemented, side channel attacks allow an unauthorized person to reveal the private key of a cryptographic module. Countermeasure a novel logic approach to Quantum-dot Cellular Automata (QCA). The proposed logic takes advantage of low power consumption QCA together with complicated clocking circuits as a paradigm of nanotechnology advances in cryptography engineering.