A benchmark analysis psevdooptymalnyh and regular topologies of networks on chip using Netmaker

Authors

  • О. Ю. Романов Національний авіаційний університет України "КПІ"
  • О. М. Лисенко Національний авіаційний університет України "КПІ"

DOI:

https://doi.org/10.18372/2073-4751.2.6502

Abstract

Approaches to optimizing network communication subsystem on a chip. The simulation psevdooptymalnyh and regular topologies of networks on chip with 9 nodes using System Verilog library Netmaker. The simulation results showed that psevdooptymalni topology for high-performance network design case with so many nodes and connecting lines that can not be achieved using standard regular topologies.

Author Biography

О. М. Лисенко, Національний авіаційний університет України "КПІ"

д.т.н.

References

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Fully-synthesizable parameterized NoC implementations library: Netmaker, http://www dyn.cl.cam.ac.uk/~rdm34/wiki.

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Published

2012-05-23

How to Cite

Романов, О. Ю., & Лисенко, О. М. (2012). A benchmark analysis psevdooptymalnyh and regular topologies of networks on chip using Netmaker. Problems of Informatization and Control, 2(38), 81–87. https://doi.org/10.18372/2073-4751.2.6502

Issue

Vol. 2 No. 38 (2012)

Section

Статті

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