Boguslavsky O. Multiprocessor System-on-Chip Internal Bus Modeling Specifics
DOI:
https://doi.org/10.18372/2073-4751.2.9083Abstract
The features of Multiprocessor System-on-Chip internal buses, w'hich should be taken into account during the analytical estimation of parallel algorithms implementation efficiency on such systems, were described in the article. As an example the MPSoC with AMBA AHB internal bus, which contains 2 CPUs, was examined. The model of this system represented with the help of PAMELA modelling language was provided. The model takes into account main features of this system architecture. The methods of estimation of average data transmission delay on bus were proposedReferences
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