The algorithm of the AES encryptor device
DOI:
https://doi.org/10.18372/2073-4751.1.10371Keywords:
ПЛІС, алгоритм, шифрування даних, AES, Rijndael, FPGA, ключ шифруAbstract
This article describes algorithm for hardware implementation of AES encryptor device on FPGAAltera Cyclone II FPGAReferences
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