Nanocircuits for Protection of the Cipher Information

Abstract

While using side-channel attacks, cipher devices was defenseless to power and electromagnetic analysis attacks. These attacks are due to the use of low cost equipment. Currently, most of the cipher circuits are implemented on complementary metal-oxide-semiconductor. The disadvantage is the relationship between the data processing the curcuit to energy consumption. When processing the CMOS transistor logic "1" and the logic "0", through the transistor passes a different volume of current. If don't implement significant counteractions, it will allow another person to decrypt the key of the cipher module. A new logical approach to quantum-dot cellular automata and single-electron transistors is explored. The proposed approach has low power consumption and complicated clocking circuits. In theory and practice of cipher protection one of the key problems is the formation of binary pseudorandom sequences of maximum length of acceptable statistical characteristics. Generators of pseudorandom sequences usually based on linear shift registers with linear feedback. Here expanded the concept of linear shift register, believing that his every category (memory cell) can be in one of the states. Call registers are "generalized linear shift registers".